 TITLE:

Express Coefficients in 13ary, Radix4 CSD to Create
Computationally Efficient Multiplierless FIR Filters
 AUTHORS:
 J. O. Coleman
 ABSTRACT:
 A two's complement DSP signal can be multiplied by a
fixed coefficient using an adder tree operating on
input shifts corresponding to nonzero coefficient
bits. Alternatively, the signed bits of a canonical
signeddigit (CSD) coefficient representation specify
an add/subtract network, with one third fewer terms
required on average. That wellknown approach is
generalized here to a radix4 CSD system that turns
out to save 36% relative to conventional CSD in the
FIRfilter application but at a perfilter overhead
cost of six smallinteger scaling operations that
represent common subexpressions implicitly factored
from the add/subtract network. The approach works for
both directform and transposedform filters and
generalizes easily to other number systems.
 DOWNLOADABLE PREPRINT:

PDF preprint (185K),
official
PDF from the The Otaniemi Campus Library, Aalto University, Finland,
 STATUS:
 Presented at the The 15th European Conf. on
Circuit Theory and Design (ECCTD
'01), Espoo, Finland, August 2001.
 DATE OF ENTRY:

August 2001.